1. Field of the Invention
The present invention generally relates to a diode and a transistor. More particularly, the present invention relates to a unipolar spin diode and transistor through a mechanism based on inhomogeneous spin polarization.
2. Description of the Related Art
Most semiconductor devices are based on the p-n diode or the transistor. A large class of transistors are the so-called bipolar transistors consisting of back to back p-n diodes either in a p-n-p or n-p-n arrangement. By controlling the chemical potential of the middle region (called the base) the collector current (IC) can be varied, and IC depends on the base voltage (VEB) exponentially.
The development of transistors and its later evolution into the integrated circuit or microchip revolutionized people""s daily life and the world. Continuous efforts have been made to find new types of diodes and transistors.
Until recently the emerging field of magneto electronics has focused on magnetic metals for conducting components [1] (hereinafter xe2x80x9c[n]xe2x80x9d referring to the nth reference in the attached list of references at the end of the specification). Multilayer magnetoelectronic devices, such as giant magnetoresistive (xe2x80x9cGMBxe2x80x9d) [2,3] and magnetic tunnel junction (MTJ) [4-6] devices, have revolutionized magnetic sensor technology and hold promise for reprogrammable logic and nonvolatile memory applications. The performance of these devices improves as the spin polarization of the constituent material approaches 100%, and thus there are continuing efforts to find 100% spin-polarized conducting materials.
Doped magnetic semiconductors are a promising direction towards such materials, for the bandwidth of the occupied carrier states is narrow. For example, for nondegenerate carriers and a spin splitting of 100 meV the spin polarization will be 98% at room temperature. To date high-temperature (TCurie greater than 100 K) ferromagnetic semiconductors such as Ga1xe2x88x92x. Mnx,As are effectively p-doped. Semi-magnetic n-doped semiconductors like BeMnZnSe, however, have already been shown to be almost, 100% polarized (in the case of BeMnZnSe in a 2T external field at 30 K) [7]. Both resonant tunneling diodes (RTDs) [8] and light-emitting diodes (LEDs) [9] have been demonstrated which incorporate one layer of ferromagnetic semiconductor. It is inevitable that devices incorporating multiple layers of ferromagnetic semiconducting material will be constructed. Note that xe2x80x9cferromagnetic semiconducting materialxe2x80x9d or xe2x80x9cferromagnetic semiconductorxe2x80x9d as used in this specification includes any magnetic and semi-magnetic semiconductors that is a semiconductor and has a spin polarization, which can be affected by or interact with a magnetic field.
Motivated by this possibility the inventors have investigated the transport properties of specific device geometries based on multilayers of spin-polarized unipolar doped semiconductors. Previous theoretical work in this area includes spin transport in homogeneous semiconductors [10,11] and calculations of spin filtering effects in superlattices [12]. The inventors continued their effort to study the nonlinear transport properties, particularly the behavior of the charge current, of two and three-layer heterostructures, and in particular, developed a unipolar spin diode and transistor through a mechanism based on inhomogeneous spin polarization.
In one aspect, the present invention provides a unipolar spin diode. In one embodiment of the present invention, the unipolar spin diode includes a first semiconductor region having a conductivity type and a spin polarization, and a second semiconductor region having a conductivity type that is same to the conductivity type of the first semiconductor and a spin polarization that is different from the spin polarization of the first semiconductor region. The first semiconductor region and the second semiconductor region are adjacent to each other so as to form a spin depletion layer therebetween, the spin depletion layer having a first side and an opposing second side. When a majority carrier in the first semiconductor region moves across the spin depletion layer from the first side of the spin depletion layer to the second side of the spin depletion layer, the majority carrier in the first semiconductor region becomes a minority carrier in the second semiconductor region. Moreover, when a majority carrier in the second semiconductor region moves across the spin depletion layer from the second side of the spin depletion layer moves to the first side of the spin depletion layer, the majority carrier in the second semiconductor region becomes a minority carrier in the first semiconductor region.
In one embodiment of the present invention, each of the first semiconductor region and the second semiconductor region comprises a p-type semiconductor layer, wherein the p-type semiconductor layer of the first semiconductor region is ferromagnetic, and the spin polarization of the first semiconductor region is either up or down. Moreover, the p-type semiconductor layer of the second semiconductor region is ferromagnetic, and the spin polarization of the second semiconductor region is either up if the spin polarization of the first semiconductor region is down, or down if the spin polarization of the first semiconductor region is up.
The majority carrier in the first semiconductor region can be a positive hole having a spin up, and the minority carrier in the first semiconductor region can be a positive hole having a spin down. Correspondingly, the majority carrier in the second semiconductor region is a positive hole having a spin down, and the minority carrier in the second semiconductor region is a positive hole having a spin up.
The majority carrier in the first semiconductor region can also be a positive hole having a spin down, and the minority carrier in the first semiconductor region is a positive hole having a spin up. Correspondingly, the majority carrier in the second semiconductor region is a positive hole having a spin up, and the minority carrier in the second semiconductor region is a positive hole having a spin down.
In other embodiment of the present invention, each of the first semiconductor region and the second semiconductor region comprises a n-type semiconductor layer, wherein the n-type semiconductor layer of the first semiconductor region is ferromagnetic, and the spin polarization of the first semiconductor region is either up or down. Moreover, the n-type semiconductor layer of the second semiconductor region is ferromagnetic, and the spin polarization of the second semiconductor region is either up if the spin polarization of the first semiconductor region is down, or down if the spin polarization of the first semiconductor region is up.
The majority carrier in the first semiconductor region can be an electron having a spin up, and the minority carrier in the first semiconductor region is an electron having a spin down. Correspondingly, the majority carrier in the second semiconductor region is an electron having a spin down, and the minority carrier in the second semiconductor region is an electron having a spin sup.
The majority carrier in the first semiconductor region can also be an electron having a spin down, and the minority carrier in the first semiconductor region is an electron having a spin up. Correspondingly, the majority carrier in the second semiconductor region is an electron having a spin up, and the minority carrier in the second semiconductor region is an electron having a spin down.
The spin deletion layer may be characterized as one of a Neel wall and a Block wall, wherein the thickness of the spin deletion layer is at least partially determined by the ratio between the magnetic anisotropy energy and the magnetic stiffness of the first semiconductor region and the second semiconductor region.
Furthermore, the diode has a substrate of either an insulating material or a semi-insulating material, wherein the substrate supports the first semiconductor region and the second semiconductor region.
In another aspect, the present invention provides a unipolar spin diode. In one embodiment of the present invention, the unipolar spin diode includes a first semiconductor region having a spin polarization characterized by a first orientation, and a second semiconductor region having a spin polarization characterized by a second orientation opposite to the first orientation of the spin polarization of the first semiconductor region. The first semiconductor region and the second semiconductor region are adjacent to each other so as to form a domain wall therebetween, wherein the domain wall has a first side and an opposing second side.
When a majority carrier in the first semiconductor region moves across the domain wall to the second semiconductor region, the majority carrier in the first semiconductor region becomes a minority carrier in the second semiconductor region. Moreover, when a majority carrier in the second semiconductor region moves across the domain wall to the first semiconductor region, the majority carrier in the second semiconductor region becomes a minority carrier in the first semiconductor region. Furthermore, majority carriers in the first semiconductor region and the second semiconductor region have the same charge polarity.
In a further aspect, the present invention provides a unipolar spin transistor. In one embodiment of the present invention, the unipolar spin transistor includes a first semiconductor region having a conductivity type and a first spin polarization, a second semiconductor region having a conductivity type that is the same conductivity type of the first semiconductor region and a second spin polarization that is different from the first spin polarization of the first semiconductor region, and a third semiconductor region having a conductivity type that is the same conductivity type of the first semiconductor region and the first spin polarization. The first semiconductor region and the second semiconductor region are adjacent to each other so as to form a first spin depletion layer therebetween, the first spin depletion layer having a first side facing the first semiconductor region and an opposing second side facing the second semiconductor region. Additionally, the second semiconductor region and the third semiconductor region are adjacent to each other so as to form a second spin depletion layer therebetween, the second spin depletion layer having a first side facing the second semiconductor region and an opposing second side facing the third semiconductor region.
When a majority carrier in the first semiconductor region moves across the first spin depletion layer from the first side of the first spin depletion layer to the second side of the first spin depletion layer, the majority carrier in the first semiconductor region becomes a minority carrier in the second semiconductor region, and when the minority carrier in the second semiconductor region moves across the second spin depletion layer from the first side of the second spin depletion layer to the second side of the second spin depletion layer, the minority carrier in the second semiconductor region becomes a majority carrier in the third semiconductor region.
Likewise, when a majority carrier in the third semiconductor region moves across the second spin depletion layer from the second side of the second spin depletion layer to the first side of the second spin depletion layer, the majority carrier in the third semiconductor region becomes a minority carrier in the second semiconductor region, and when the minority carrier in the second semiconductor region moves across the first spin depletion layer from the second side of the first spin depletion layer to the first side of the first spin depletion layer, the minority carrier in the second semiconductor region becomes a majority carrier in the first semiconductor region.
In one embodiment of the present invention, each of the first semiconductor region, the second semiconductor region and the third semiconductor region comprises a p-type semiconductor layer. The p-type semiconductor layer of the second semiconductor region is ferromagnetic, and the spin polarization of the second semiconductor region is either up or down. Moreover, the p-type semiconductor layer of the first semiconductor region and the p-type semiconductor layer of the third semiconductor region are ferromagnetic, and the spin polarization of the first semiconductor region and the spin polarization of the third semiconductor region are either up if the spin polarization of the second semiconductor region is down, or down if the spin polarization of the second semiconductor region is up.
In another embodiment of the present invention, each of the first semiconductor region, the second semiconductor region and the third semiconductor region comprises a n-type semiconductor layer. The n-type semiconductor layer of the second semiconductor region is ferromagnetic, and the spin polarization of the second semiconductor region is either up or down. Moreover, the n-type semiconductor layer of the first semiconductor region and the n-type semiconductor layer of the third semiconductor region are ferromagnetic, and the spin polarization of the first semiconductor region and the spin polarization of the third semiconductor region are either up if the spin polarization of the second semiconductor region is down, or down if the spin polarization of the second semiconductor region is up.
Each of the first spin deletion layer and the second spin deletion layer may be characterized as one of a Neel wall and a Block wall, wherein the thickness of each of the first spin deletion layer and the second spin deletion layer is at least partially determined by the ratio between the magnetic anisotropy energy and the magnetic stiffness of the first semiconductor region and the second semiconductor region, and the second semiconductor region and the third semiconductor region, respectively.
The transistor further includes a substrate of either an insulating material or a semi-insulating material, wherein the substrate supports the first semiconductor region, the second semiconductor region and the third semiconductor region.
In yet another aspect, the present invention provides a method of changing amplitude of electric signals. In one embodiment of the present invention, the method includes the steps of providing a semiconductor material having a first region, a second region, and a third region, wherein the first region is adjacent to the second region so as to form a first domain between the first region and the second region, and the second region is adjacent to the third region so as to form a second domain between the second region and the third region, providing a first voltage between the first region and the second region to cause carriers to move across the first domain from the first region to the second region, and generating a second voltage between the second region and the third region to cause the carriers move across the second domain from the second region to the third region and the second voltage has an amplitude different from that of the first voltage. The first region and the third region have a first spin polarization and the second region has a second spin polarization different from the first spin polarization. Moreover, the carriers in each of the first, second and third regions have same charge polarity.
The first spin polarization can be up and correspondingly, the second spin polarization is down. The first spin polarization can be down and correspondingly, the second spin polarization is up. The carriers can be electrons or holes.
In a further aspect, the present invention provides an apparatus of changing amplitude of electric signals. In one embodiment of the present invention, the apparatus includes a semiconductor material having a first region, a second region, and a third region, wherein the first region is adjacent to the second region so as to form a first domain between the first region and the second region, and the second region is adjacent to the third region so as to form a second domain between the second region and the third region. The apparatus further has means for providing a first voltage between the first region and the second region to cause carriers to move across the first domain from the first region to the second region, and means for generating a second voltage between the second region and the third region to cause the carriers move across the second domain from the second region to the third region and the second voltage has an amplitude different from that of the first voltage, wherein the first region and the third region has a first spin polarization and the second region has a second spin polarization different from the first spin polarization, and the carriers in each of the first, second and third regions has same charge polarity.
In another aspect, the present invention provides a memory cell having a unipolar spin transistor for nonvolatile memory applications for storing a data state corresponding to one of a first and a second logical data values. In one embodiment of the present invention, the memory cell includes a magnetic semiconductor material having a first region, a second region, and a third region, wherein the first region is adjacent to the second region so as to form a first domain between the first region and the second region, and the second region is adjacent to the third region so as to form a second domain between the second region and the third region. Moreover, the first region and the third region has a first spin polarization and the second region has a second spin polarization, each of the first spin polarization and the second spin polarization can be up or down.
The ferromagnetic semiconductor material is in a high-resistance state when the second spin polarization of the second region is opposite to the first spin polarization of the first and third regions, and the ferromagnetic semiconductor material is in a low-resistance state when the second spin polarization of the second region is aligned to the first spin polarization of the first and third regions. The memory cell stores the first logical value when the ferromagnetic semiconductor material is in the high-resistance state, and the memory cell stores the second logical value when the ferromagnetic semiconductor material is in the low-resistance state. The memory is retained until a different state is stored in the cell.
The orientation of the second spin polarization can be altered by an external magnetic field to become one of aligned and opposite to the orientation of the first spin polarization. In one embodiment, the first region comprises an emitter of the unipolar spin transistor, the second region comprises a base of the unipolar spin transistor and the third region comprises a collector of the unipolar spin transistor. The magnetic semiconductor material can be chosen from a variety of magnetic materials such as GaMnAs, TiCoO2, BeMnZnSe and the like.
In yet another aspect, the present invention provides a method of operating a unipolar spin transistor for nonvolatile memory applications for storing a data state corresponding to one of a first and a second logical data values, wherein the unipolar spin transistor includes a magnetic semiconductor material having a first region, a second region, and a third region, wherein the first region is adjacent to the second region so as to form a first domain between the first region and the second region, and the second region is adjacent to the third region so as to form a second domain between the second region and the third region, wherein the first region and the third region has a first spin polarization and the second region has a second spin polarization, each of the first spin polarization and the second spin polarization can be up or down, and wherein the ferromagnetic semiconductor material is in a high-resistance state when the second spin polarization of the second region is opposite to the first spin polarization of the first and third regions, and the ferromagnetic semiconductor material is in a low-resistance state when the second spin polarization of the second region is aligned to the first spin polarization of the first and third regions.
In one embodiment of the present invention, the method includes the steps of altering the orientation of the second spin polarization to become one of aligned and opposite to the orientation of the first spin polarization, and storing the first logical data value when the ferromagnetic semiconductor material is in the high-resistance state, and storing the second logical value when the ferromagnetic semiconductor material is in the low-resistance state.
In yet another aspect, the present invention provides a method of operating a unipolar spin transistor for detecting magnetic field, wherein the unipolar spin transistor includes a magnetic semiconductor material having a first region, a second region, and a third region, wherein the first region is adjacent to the second region so as to form a first domain between the first region and the second region, and the second region is adjacent to the third region so as to form a second domain between the second region and the third region, wherein the first region and the third region has a first spin polarization and the second region has a second spin polarization, each of the first spin polarization and the second spin polarization can be up or down, and wherein the ferromagnetic semiconductor material is in a high-resistance state when the second spin polarization of the second region is opposite to the first spin polarization of the first and third regions, and the ferromagnetic semiconductor material is in a low-resistance state when the second spin polarization of the second region is aligned to the first spin polarization of the first and third regions.
In one embodiment of the present invention, the method includes the steps of subjecting the second region to a test area, measuring the status of the ferromagnetic semiconductor material, and determining the presence of an external magnetic field, wherein the presence of an external magnetic field causes the status of the ferromagnetic semiconductor material to alter from one of the high-resistance state and the low-resistance state to another.
In another aspect, the present invention provides an apparatus of operating a unipolar spin transistor for detecting magnetic field, wherein the unipolar spin transistor includes a magnetic semiconductor material having a first region, a second region, and a third region, wherein the first region is adjacent to the second region so as to form a first domain between the first region and the second region, and the second region is adjacent to the third region so as to form a second domain between the second region and the third region, wherein the first region and the third region has a first spin polarization and the second region has a second spin polarization, each of the first spin polarization and the second spin polarization can be up or down, and wherein the ferromagnetic semiconductor material is in a high-resistance state when the second spin polarization of the second region is opposite to the first spin polarization of the first and third regions, and the ferromagnetic semiconductor material is in a low-resistance state when the second spin polarization of the second region is aligned to the first spin polarization of the first and third regions.
In one embodiment of the present invention, the apparatus has means for subjecting the second region to a test area, means for measuring the status of the ferromagnetic semiconductor material, and means for determining the presence of an external magnetic field, wherein the presence of an external magnetic field causes the status of the ferromagnetic semiconductor material to alter from one of the high-resistance state and the low-resistance state to another. The subjecting means can be a read head.
In a further aspect, the present invention provides a method of operating a unipolar spin transistor for detecting magnetic field, wherein the unipolar spin transistor includes a magnetic semiconductor material having a first region, a second region, and a third region, wherein the first region is adjacent to the second region so as to form a first domain between the first region and the second region, and the second region is adjacent to the third region so as to form a second domain between the second region and the third region, wherein the first region has a first spin polarization, the second region has a second spin polarization opposite to the first spin polarization, and the third region has a third spin polarization parallel to the first spin polarization, wherein a minority carrier in the second region is characterized by an energy band having a barrier height, and wherein the ferromagnetic semiconductor material has a resistance related to the barrier height. Each of the first region, the second region and the third region can comprise a p-type semiconductor layer or an n-type semiconductor layer.
In one embodiment of the present invention, the method includes the steps of subjecting the second region to a test area, measuring the resistance of the ferromagnetic semiconductor material, and determining the presence of an external magnetic field, wherein the presence of an external magnetic field causes the barrier height of the energy band of the minority carrier to change, and wherein the change of the barrier height of the energy band causes the resistance of the ferromagnetic semiconductor material to change from one value to another. Each of the first region, the second region and the third region can comprise a p-type semiconductor layer or an n-type semiconductor layer.
In another aspect, the present invention provides an apparatus of operating a unipolar spin transistor for detecting magnetic field, wherein the unipolar spin transistor includes a magnetic semiconductor material having a first region, a second region, and a third region, wherein the first region is adjacent to the second region so as to form a first domain between the first region and the second region, and the second region is adjacent to the third region so as to form a second domain between the second region and the third region, wherein the first region has a first spin polarization, the second region has a second spin polarization opposite to the first spin polarization, and the third region has a third spin polarization parallel to the first spin polarization, wherein a minority carrier in the second region is characterized by an energy band having a barrier height, and wherein the ferromagnetic semiconductor material has a resistance related to the barrier height.
In one embodiment of the present invention, the apparatus has means for subjecting the second region to a test area, means for measuring the resistance of the ferromagnetic semiconductor material, and means for determining the presence of an external magnetic field, wherein the presence of an external magnetic field causes the barrier height of the energy band of the minority carrier to change, and wherein the change of the barrier height of the energy band causes the resistance of the ferromagnetic semiconductor material to change from one value to another.
In yet another aspect, the present invention provides a method of operating a unipolar spin transistor in a reprogrammable logic process determined by a combination of input logic signals, wherein the unipolar spin transistor includes a magnetic semiconductor material having a first region, a second region, and a third region, wherein the first region is adjacent to the second region so as to form a first domain between the first region and the second region, and the second region is adjacent to the third region so as to form a second domain between the second region and the third region, wherein the first region and the third region has a first spin polarization and the second region has a second spin polarization, each of the first spin polarization and the second spin polarization can be up or down, wherein the ferromagnetic semiconductor material is in a first non-volatile state when the second spin polarization of the second region is opposite to the first spin polarization of the first and third regions, and the ferromagnetic semiconductor material is in a second non-volatile state when the second spin polarization of the second region is aligned to the first spin polarization of the first and third regions, and wherein each of the first and second non-volatile states represents a binary value.
In one embodiment of the present invention, the method includes the steps of subjecting the second region to a magnetic field to cause the state of the ferromagnetic semiconductor material to alter from one of the first and second non-volatile states to another, thereby generating a new binary value relating to a new input logic signal, and storing the new binary value relating to a new input logic signal so as to reprogram a logic process.
In a further aspect, the present invention provides an apparatus of operating a unipolar spin transistor in a reprogrammable logic process determined by a combination of input logic signals, wherein the unipolar spin transistor includes a magnetic semiconductor material having a first region, a second region, and a third region, wherein the first region is adjacent to the second region so as to form a first domain between the first region and the second region, and the second region is adjacent to the third region so as to form a second domain between the second region and the third region, wherein the first region and the third region has a first spin polarization and the second region has a second spin polarization, each of the first spin polarization and the second spin polarization can be up or down, wherein the ferromagnetic semiconductor material is in a first non-volatile state when the second spin polarization of the second region is opposite to the first spin polarization of the first and third regions, and the ferromagnetic semiconductor material is in a second non-volatile state when the second spin polarization of the second region is aligned to the first spin polarization of the first and third regions, and wherein each of the first and second non-volatile states represents a binary value.
In one embodiment of the present invention, the apparatus includes means for subjecting the second region to a magnetic field to cause the state of the ferromagnetic semiconductor material to alter from one of the first and second non-volatile states to another, thereby generating a new binary value relating to a new input logic signal, and means for storing the new binary value relating to a new input logic signal so as to reprogram a logic process.